Xilinx 1000BASE-X Manual do Utilizador

RLogiCORE™ IPEthernet 1000BASE-X PCS/PMA or SGMII v9.1User Guide UG155 March 24, 2008

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008RChapter 6: The Ten-Bit InterfaceFigure 6-1: Ten-Bit Interface Transmitt

100 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 101UG155 March 24, 2008RocketIO Logic with the Fabric Rx Elastic BufferRVirtex-4 Devices for

102 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 103UG155 March 24, 2008RocketIO Logic with the Fabric Rx Elastic BufferRVirtex-5 LXT or SXT D

104 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 105UG155 March 24, 2008RocketIO Logic with the Fabric Rx Elastic BufferRVirtex-5 FXT Devices

106 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 107UG155 March 24, 2008Clock Sharing - Multiple Cores with RocketIO, Fabric Elastic BufferRCl

108 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 109UG155 March 24, 2008Clock Sharing - Multiple Cores with RocketIO, Fabric Elastic BufferRVi

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008RChapter 11: Dynamic Switching of 1000BASE-X and SGMII StandardsFigure 11

110 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 111UG155 March 24, 2008Clock Sharing - Multiple Cores with RocketIO, Fabric Elastic BufferRVi

112 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 113UG155 March 24, 2008Clock Sharing - Multiple Cores with RocketIO, Fabric Elastic BufferRVi

114 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 115UG155 March 24, 2008RChapter 9Configuration and StatusThis chapter provides general guidel

116 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusR.The MDIO bus system is a standard

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 117UG155 March 24, 2008MDIO Management InterfaceRWrite TransactionFigure 9-2 shows a write tr

118 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRknown by the MDIO master (in this

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 119UG155 March 24, 2008Management RegistersR.Management RegistersThe contents of the Manageme

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008R

120 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 0: Control Register2,3 PH

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 121UG155 March 24, 2008Management RegistersR0.13 Speed Selection (LSB)Always returns a 0 for

122 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 1: Status RegisterMDIO Re

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 123UG155 March 24, 2008Management RegistersRRegisters 2 and 3: PHY Identifiers1.4 Remote Faul

124 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 4: Auto-Negotiation Adver

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 125UG155 March 24, 2008Management RegistersRRegister 5: Auto-Negotiation Link Partner Base4.6

126 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 6: Auto-Negotiation Expan

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 127UG155 March 24, 2008Management RegistersRRegister 8: Next Page ReceiveTable 9-9: Auto-Nego

128 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 15: Extended Status8.12 A

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 129UG155 March 24, 2008Management RegistersRRegister 16: Vendor-Specific Auto-Negotiation Int

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008Chapter 2: Core ArchitectureTable 2-1: GMII Interface Signal Pinout . .

130 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 0: Control RegisterMDIO R

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 131UG155 March 24, 2008Management RegistersRRegister 1: Status Register0.9 Restart Auto- Nego

132 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusR1.10 100BASE-T2 Full DuplexAlways

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 133UG155 March 24, 2008Management RegistersRRegisters 2 and 3: Phy IdentifierRegister 15: Ext

134 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRTable 9-17: Extended Status (Regis

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 135UG155 March 24, 2008Management RegistersRSGMII Standard Using the Optional Auto-Negotiatio

136 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRTable 9-19: SGMII Control (Registe

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 137UG155 March 24, 2008Management RegistersRRegister 1: SGMII Status0.5 Unidirectional Enable

138 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusR1.7 Unidirectional AbilityAlways r

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 139UG155 March 24, 2008Management RegistersRRegisters 2 and 3: PHY IdentifierRegister 4: SGMI

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008RTable 9-21: PHY Identifier (Registers 2 and 3) . . . . . . . . . . . .

140 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 5: SGMII Auto-Negotiation

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 141UG155 March 24, 2008Management RegistersRRegister 6: SGMII Auto-Negotiation ExpansionRegis

142 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 8: SGMII Next Page Receiv

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 143UG155 March 24, 2008Management RegistersRRegister 15: SGMII Extended StatusMDIO Register 1

144 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 16: SGMII Auto-Negotiatio

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 145UG155 March 24, 2008Management RegistersRSGMII Standard without the Optional Auto-Negotiat

146 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRTable 9-30: SGMII Control (Registe

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 147UG155 March 24, 2008Management RegistersRRegister 1: SGMII Status0.5 Unidirectional Enable

148 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusR1.7 Unidirectional AbilityAlways r

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 149UG155 March 24, 2008Management RegistersRRegisters 2 and 3: PHY IdentifierRegister 4: SGMI

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 17UG155 March 24, 2008RPrefaceAbout This GuideThe LogiCORE™ IP Ethernet 1000BASE-X PCS/PMA or

150 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRRegister 15: SGMII Extended Status

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 151UG155 March 24, 2008Optional Configuration VectorRRegister 17: Vendor-specific Standard Se

152 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 9: Configuration and StatusRThese signals may be changed by th

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 153UG155 March 24, 2008RChapter 10Auto-NegotiationThis chapter provides general guidelines fo

154 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 10: Auto-NegotiationRa link segment (the link partner) and to

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 155UG155 March 24, 2008Overview of OperationRSGMII StandardFigure 10-2 illustrates the operat

156 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 10: Auto-NegotiationRSetting the Configurable Link Timer The o

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 157UG155 March 24, 2008RChapter 11Dynamic Switching of 1000BASE-X and SGMII StandardsThis cha

158 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 11: Dynamic Switching of 1000BASE-X and SGMII StandardsROperat

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 159UG155 March 24, 2008Operation of the CoreRreplace the link_timer_value[8:0] port that is u

18 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Preface: About This GuideR• Chapter 11, “Dynamic Switching of 1000BASE-

160 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 11: Dynamic Switching of 1000BASE-X and SGMII StandardsR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 161UG155 March 24, 2008RChapter 12Constraining the CoreThis chapter defines the constraint re

162 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRthe HDL source code for the example

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 163UG155 March 24, 2008Required ConstraintsR#################################################

164 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRVirtex-4 RocketIO MGTs for 1000BASE-

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 165UG155 March 24, 2008Required ConstraintsRThe following UCF syntax shows these constraints

166 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRVirtex-4 RocketIO MGTs for SGMII or

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 167UG155 March 24, 2008Required ConstraintsRVirtex-5 RocketIO GTP Transceivers for SGMII or D

168 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRNET "*clkin" TNM_NET = &qu

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 169UG155 March 24, 2008Required ConstraintsRClock Period ConstraintsThe clocks provided to pm

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 19UG155 March 24, 2008ConventionsROnline DocumentThe following conventions are used in this d

170 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRIn addition, the example design prov

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 171UG155 March 24, 2008Required ConstraintsRINST "core_wrapper/tbi_rx_clk1_dcm" CLK

172 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRVirtex-5 DevicesFigure 6-6, page 75

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 173UG155 March 24, 2008Required ConstraintsR#################################################

174 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRGMII Input Setup/Hold TimingInput GM

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 175UG155 March 24, 2008Required ConstraintsRtiming which is achieved after place-and-route is

176 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreRINST "gmii_data_bus[6].delay_gm

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 177UG155 March 24, 2008Required ConstraintsRData Sheet report:-----------------All values dis

178 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 12: Constraining the CoreR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 179UG155 March 24, 2008RChapter 13Interfacing to Other CoresThis chapter describes some addit

20 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Preface: About This GuideR

180 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRFigure 13-1: 1-Gigabit Ethernet

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 181UG155 March 24, 2008Integrating with the 1-Gigabit Ethernet MAC CoreRIntegration of the 1-

182 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresR• If both cores have been gener

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 183UG155 March 24, 2008Integrating with the 1-Gigabit Ethernet MAC CoreRFeatures of this conf

184 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRFeatures of this configuration

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 185UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFeatures of this confi

186 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresR• If both cores have been gener

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 187UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFigure 13-6: Tri-Speed

188 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRIntegration of the Tri-Mode Eth

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 189UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFigure 13-7: Tri-Speed

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 21UG155 March 24, 2008RChapter 1IntroductionThe Ethernet 1000BASE-X PCS/PMA or SGMII core is

190 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRVirtex-4 DevicesFigure 13-8 ill

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 191UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFigure 13-8: Tri-Speed

192 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRVirtex-5 LXT and SXT DevicesFig

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 193UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFigure 13-9: Tri-Speed

194 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresRVirtex-5 FXT DevicesFigure 13-1

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 195UG155 March 24, 2008Integrating with the Tri-Mode Ethernet MAC CoreRFigure 13-10: Tri-Spee

196 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 13: Interfacing to Other CoresR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 197UG155 March 24, 2008RChapter 14Special Design ConsiderationsThis chapter describes the uni

198 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 14: Special Design ConsiderationsRpage 38). This instructs the

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 199UG155 March 24, 2008LoopbackRFigure 14-2: Loopback Implementation When Using the Core with

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Xilinx is disclosing this Specification to you solely for use in the devel

22 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 1: IntroductionRAdditional Core ResourcesFor detailed informati

200 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 14: Special Design ConsiderationsR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 201UG155 March 24, 2008RChapter 15Implementing the DesignThis chapter describes how to simula

202 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 15: Implementing the DesignRSee the XST User Guide for more in

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 203UG155 March 24, 2008Post-Implementation SimulationRlayout and timing requirements specifie

204 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 15: Implementing the DesignRIn addition, use the following gui

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 205UG155 March 24, 2008RAppendix ACore Verification, Compliance, and InteroperabilityVerifica

206 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix A: Core Verification, Compliance, and InteroperabilityR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 207UG155 March 24, 2008RAppendix BCore LatencyCore LatencyThe standalone core does not meet a

208 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix B: Core LatencyRLatency for 1000BASE-X PCS and PMA Using a Ro

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 209UG155 March 24, 2008RAppendix CCalculating the DCM Fixed Phase Shift ValueRequirement for

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 23UG155 March 24, 2008FeedbackRDocumentFor comments or suggestions about this document, pleas

210 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix C: Calculating the DCM Fixed Phase Shift ValueRphase shift va

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 211UG155 March 24, 2008RAppendix D1000BASE-X State MachinesThis appendix is intended to serve

212 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix D: 1000BASE-X State MachinesRStart of Frame EncodingThe Even

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 213UG155 March 24, 2008Start of Frame EncodingRReception of the Even CaseFigure D-2 illustrat

214 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix D: 1000BASE-X State MachinesRReception of the Odd CaseFigure

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 215UG155 March 24, 2008End of Frame EncodingRPreamble ShrinkageAs previously described, a sin

216 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix D: 1000BASE-X State MachinesRReception of the Even CaseFigure

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 217UG155 March 24, 2008End of Frame EncodingRNote: The first Idle to follow the frame termina

218 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix D: 1000BASE-X State MachinesR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 219UG155 March 24, 2008RAppendix ERx Elastic Buffer SpecificationsThis appendix is intended t

24 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 1: IntroductionR

220 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix E: Rx Elastic Buffer SpecificationsRVirtex-II Pro and Virtex-

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 221UG155 March 24, 2008Rx Elastic Buffers: Depths and Maximum Frame SizesRVirtex-4 FX Conside

222 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix E: Rx Elastic Buffer SpecificationsRSGMII Fabric Rx Elastic B

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 223UG155 March 24, 2008Rx Elastic Buffers: Depths and Maximum Frame SizesRTBI Rx Elastic Buff

224 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix E: Rx Elastic Buffer SpecificationsRNote that this analysis a

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 225UG155 March 24, 2008Clock CorrectionRIdle Character Removal at 100 Mbps (SGMII)At SGMII, 1

226 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix E: Rx Elastic Buffer SpecificationsRMaximum Frame Sizes for S

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 227UG155 March 24, 2008RAppendix FDebugging GuideThis appendix provides assistance for debugg

228 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix F: Debugging GuideRIf data is being transmitted and received

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 229UG155 March 24, 2008Problems with a High Bit Error RateRRocketIO Transceiver SpecificWhen

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 23UG155 March 24, 2008RChapter 2Core ArchitectureThis chapter describes the architecture of t

230 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Appendix F: Debugging GuideRRocketIO Transceiver Specific ChecksPerfor

24 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRGMII BlockA client-side GMII is provided w

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 25UG155 March 24, 2008System OverviewROptional PCS Management Registers Configuration and sta

26 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureR8B/10B Encoder8B10B encoding, as defined i

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 27UG155 March 24, 2008Core InterfacesRfunctionality. For more information, see Chapter 3, “Ge

28 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRFigure 2-4 shows the pinout for the Ethern

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 29UG155 March 24, 2008Core InterfacesRFigure 2-5 shows the pinout for the Ethernet 1000BASE-X

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008Schedule of Figures. . . . . . . . . . . . . . . . . . . . . . . . . . . .

30 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRFigure 2-6 shows the pinout for the Ethern

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 31UG155 March 24, 2008Core InterfacesRFigure 2-7 shows the pinout for the Ethernet 1000BASE-X

32 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRTable 2-1: GMII Interface Signal PinoutSig

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 33UG155 March 24, 2008Core InterfacesRCommon Signal PinoutTable 2-2 describes the remaining s

34 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRMDIO Management Interface Pinout (Optional

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 35UG155 March 24, 2008Core InterfacesRConfiguration Vector (Optional)Table 2-4 shows the alte

36 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureRDynamic Switching Signal PinoutTable 2-6 d

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 37UG155 March 24, 2008Core InterfacesR Table 2-7: Optional RocketIO Transceiver Interface Pin

38 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 2: Core ArchitectureR1000BASE-X PCS with TBI PinoutTable 2-8 de

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 39UG155 March 24, 2008RChapter 3Generating and Customizing the Core The Ethernet 1000BASE-X P

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008RImplement the Ethernet 1000BASE-X PCS/PMA or SGMII Core in Your Applicati

40 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 3: Generating and Customizing the CoreRSelect StandardSelect fr

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 41UG155 March 24, 2008GUI InterfaceRPhysical InterfaceDepending on the target architecture, t

42 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 3: Generating and Customizing the CoreRThis screen lets you sel

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 43UG155 March 24, 2008Parameter Values in the XCO FileRRocketIO Tile ConfigurationThe RocketI

44 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 3: Generating and Customizing the CoreRTable 3-1 describes the

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 45UG155 March 24, 2008RChapter 4Designing with the CoreThis chapter provides information abou

46 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 4: Designing with the CoreR1000BASE-X Standard Using RocketIO T

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 47UG155 March 24, 2008Design OverviewR1000BASE-X Standard with TBI Example DesignFigure 4-2 i

48 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 4: Designing with the CoreRSGMII Standard Using a RocketIO Tran

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 49UG155 March 24, 2008Design OverviewRSGMII Standard with TBI Transceiver Example DesignFigur

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008RVirtex-5 LXT and SXT Devices . . . . . . . . . . . . . . . . . . . . . .

50 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 4: Designing with the CoreRDesign GuidelinesGenerate the CoreGe

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 51UG155 March 24, 2008Design GuidelinesRWrite an HDL ApplicationAfter reviewing the example d

52 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 4: Designing with the CoreRKeep it RegisteredTo simplify timing

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 53UG155 March 24, 2008RChapter 5Using the Client-side GMII Data PathThis chapter provides gen

54 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRError PropagationA corr

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 55UG155 March 24, 2008Designing with the Client-side GMII for the 1000BASE-X StandardRNormal

56 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRFalse CarrierFigure 5-6

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 57UG155 March 24, 2008Designing with the Client-side GMII for the 1000BASE-X StandardRBits[4:

58 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRbe included in the fram

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 59UG155 March 24, 2008Designing with Client-side GMII for the SGMII StandardRDesigning with C

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008RVirtex-5 RocketIO GTX Transceivers for SGMII or Dynamic Standards Switchi

60 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathR10 Megabit per Second F

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 61UG155 March 24, 2008Using the GMII as an Internal ConnectionR10 Megabit per Second Frame Re

62 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRVirtex-II Pro and Virte

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 63UG155 March 24, 2008Implementing External GMIIRSpartan-3, Spartan-3E and Spartan-3A Devices

64 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRVirtex-4 DevicesThe log

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 65UG155 March 24, 2008Implementing External GMIIRVirtex-5 DevicesFigure 5-17 illustrates how

66 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathRGMII Receiver LogicFigu

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 67UG155 March 24, 2008Implementing External GMIIRFigure 5-18: External GMII Receiver LogicIOB

68 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 5: Using the Client-side GMII Data PathR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 69UG155 March 24, 2008RChapter 6The Ten-Bit InterfaceThis chapter provides general guidelines

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008RAppendix B: Core LatencyCore Latency. . . . . . . . . . . . . . . . . .

70 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 6: The Ten-Bit InterfaceRReceiver LogicVirtex-II and Virtex-II

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 71UG155 March 24, 2008Ten-Bit-Interface LogicRsynchronous to pma_rx_clk0_bufg and pma_rx_clk1

72 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 6: The Ten-Bit InterfaceRSpartan-3, Spartan-3E and Spartan-3A D

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 73UG155 March 24, 2008Ten-Bit-Interface LogicRVirtex-4 DevicesMethod 1The Virtex-4 FPGA logic

74 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 6: The Ten-Bit InterfaceRMethod 2This logic from method 1 relie

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 75UG155 March 24, 2008Ten-Bit-Interface LogicRVirtex-5 DevicesMethod 1The Virtex-5 FPGA logic

76 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 6: The Ten-Bit InterfaceRMethod 2This logic from method 1 relie

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 77UG155 March 24, 2008Clock Sharing across Multiple Cores with TBIRClock Sharing across Multi

78 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 6: The Ten-Bit InterfaceR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 79UG155 March 24, 2008RChapter 71000BASE-X with RocketIO TransceiversThis chapter provides ge

www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008R

80 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRFigure 7-1: 1000BASE-X

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 81UG155 March 24, 2008RocketIO Transceiver LogicRVirtex-4 FX DevicesThe core is designed to i

82 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRFigure 7-2: 1000BASE-X

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 83UG155 March 24, 2008RocketIO Transceiver LogicRVirtex-5 LXT and SXT DevicesThe core is desi

84 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRFigure 7-3: 1000BASE-X

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 85UG155 March 24, 2008RocketIO Transceiver LogicRVirtex-5 FXT DevicesThe core is designed to

86 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRFigure 7-4: 1000BASE-X

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 87UG155 March 24, 2008Clock Sharing Across Multiple Cores with RocketIORClock Sharing Across

88 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRVirtex-4 FX DevicesFig

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 89UG155 March 24, 2008Clock Sharing Across Multiple Cores with RocketIORFigure 7-6: Clock Man

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.comUG155 March 24, 2008Chapter 2: Core ArchitectureFigure 2-1: Functional Block Diagram Using R

90 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRVirtex-5 LXT and SXT D

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 91UG155 March 24, 2008Clock Sharing Across Multiple Cores with RocketIORFigure 7-7: Clock Man

92 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversRVirtex-5 FXT DevicesFi

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 93UG155 March 24, 2008Clock Sharing Across Multiple Cores with RocketIORFigure 7-8: Clock Man

94 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 7: 1000BASE-X with RocketIO TransceiversR

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 95UG155 March 24, 2008RChapter 8SGMII / Dynamic Standards Switching with RocketIO Transceiver

96 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceive

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 97UG155 March 24, 2008Receiver Elastic Buffer ImplementationsRConsidering the 10 Mbps case, w

98 www.xilinx.com Ethernet 1000BASE-X PCS/PMA or SGMII v9.1UG155 March 24, 2008Chapter 8: SGMII / Dynamic Standards Switching with RocketIO Transceive

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 99UG155 March 24, 2008RocketIO Logic with the Fabric Rx Elastic BufferRRocketIO Logic with th