DS619 April 7, 2009 www.xilinx.com 11
Product Specification
Every match unit group has a match type and match counter width parameter. The match unit type describes the
type of compare operation that can be done on a match unit. The valid values for this type are defined for each
match unit. For example, C_MU_1_TYPE only supports basic and basic with edges since multiple signals make
up this match unit. Alternately, for C_MU_3_TYPE all compare options are available since this match unit has the
complete PLB_ABus bus connected to it. The match counter width allows you to look for multiple occurrences of
the match event. This counter width is controllable through the C_MU_xx_CNT_W parameter (where xx is a
place holder for the MU signal value, 1-13). When this parameter is set to 0, only one occurrence is counted; oth-
erwise, the maximum match event count is limited by the width of this parameter.
The number of match units is defined by the C_MU_xx_NUM parameter. By default, if a match unit does not
have this parameter, only one match unit is used for the match unit group. If the C_MU_xx_NUM parameter is
defined, then one or two match units can be assigned for this match group. When multiple match units are avail-
able, sequences of a match unit group can be detected. For example, in MU_2, a trigger sequence could be created
to look for PLB_PAValid=1 followed by a rising edge on PLB_SaddrAck. For this specific trigger event the first
match unit of MU_2 would be set to PLB_PAValid=1 and the second to PLB_SaddrAck=R.
Allowable Parameter Combinations
All parameters are independent of each other. Each parameter must be in the range or exact value as listed in
Table 2. Certain combinations will disable the sub-parameters. For example, consider when C_USE_MU_3 is set
to 0. In this case all the C_MU_3_<XYZ> parameters are ignored because the match unit group has been disabled.
Depending on the architecture certain parameters may fail during a design rule check. For instance, if you specify
C_NUM_DATA_SAMPLES to be 32768 for a non-Virtex-5 device, you will get an error message. Also there you
must have a width of at least one signal going to the data sample storage buffer.
ChipScope PLB46 IBA Module Block Diagram
X-Ref Target - Figure 1
Figure 1: ChipScope PLB46 IBA Block Diagram
Chipscope
ICON
icon_control
clk
PLB
mon_plb
Chipscope
PLB_IBA
iba_trig_in
iba_trig_out
DS283_01_092506
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