Xilinx UG492 Manual do Utilizador Página 114

  • Descarregar
  • Adicionar aos meus manuais
  • Imprimir
  • Página
    / 172
  • Índice
  • MARCADORES
  • Avaliado. / 5. Com base em avaliações de clientes
Vista de página 113
114 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 July 23, 2010
Chapter 12: System Integration
Because the TEMAC core can often be used in different clocking modes, note the following:
The Ethernet transmitter client clock domain must always be connected to the
tx_clk input of the Ethernet AVB Endpoint core. Additionally, the transmitter clock
enable, as used with the TEMAC, must always be connected to the tx_clk_en input
of the Ethernet AVB Endpoint core.
The Ethernet receiver client clock domain must always be connected to the rx_clk
input of the Ethernet AVB Endpoint core. Additionally, the receiver clock enable, as
used with the TEMAC, must always be connected to the rx_clk_en input of the
Ethernet AVB Endpoint core.
The host_clk inputs of the Ethernet AVB Endpoint and of the TEMAC must always
share the same clock source. If desired, this can also be the clock source used for the
PLB interface.
Vista de página 113
1 2 ... 109 110 111 112 113 114 115 116 117 118 119 ... 171 172

Comentários a estes Manuais

Sem comentários